FIG. 7 is a circuit diagram illustrating a structure of a prior art distributed amplifier. In FIG. 7, a distributed amplifier 700 comprises an input side circuit 70a connected between an input terminal and ground, an output side circuit 70b connected between an output terminal 2 and ground, and source-grounded FETs 70c and 70d connected between the input circuit 70a and the output circuit 70b. The input side circuit 70a comprises three distributed constant lines 3a to 3c, a terminal resistor 8 of 50 .OMEGA., and a bypass capacitor 9 which are connected in series between the input terminal 1 and ground. The output side circuit 70b comprises three distributed constant lines 3d to 3f, a terminal resistor 8 of 50 .OMEGA., and a bypass capacitor 9 which are connected in series between the output terminal 2 and ground. The source-grounded FET 70c includes a gate connected to the junction of the input side distributed constant lines 3a and 3b and a drain connected to the junction of the output side distributed constant lines 3e and 3f via a distributed constant line 10. The source-grounded FET 70c includes a gate connected to the junction of the input side distributed constant lines 3b and 3c and a drain connected to the junction of the output side distributed constant lines 3d and 3e via a distributed constant line 10.
Each of the source-grounded FETs 70c and 70d is illustrated as an equivalent circuit comprising a gate-to-source capacitance 4, a current supply 5 controlled by a gate bias voltage, and a drain-to-source capacitance 6.
In the distributed amplifier 700, if the distributed constant lines 3a to 3c of the input side circuit 70a on the gate side of the source-grounded FET 70c (70d) are regarded as an inductance (Lg), the gate-source capacitance (Cgs) 4 of the FET and the inductance (Lg) form a circuit equivalent to a distributed constant line on the gate side of the FET. Similarly, if the distributed constant line 10 connected to the drain of the source-grounded FET 70c (70d) is regarded as an inductance (Ld), the drain-source capacitance (Cds) 6 of the FET and the inductance (Ld) form a circuit equivalent to a distributed constant line on the drain side of the FET.
A description is given of the operation.
Assuming that the input or output side characteristic impedance is Zo, the following equation (3) applies to the gate side of the source-grounded FET 70c (70d). ##EQU1##
In this case, the cut-off frequency fc is represented by ##EQU2##
The same relationship as described above applies to the drain side of the FET. Further, the input signal is amplified by the FET.
As described above, this distributed amplifier 700 is a broadband amplifier that can be used at frequencies up to the cut-off frequency.
When a Transmit/Receive (hereinafter referred to as T/R) module is fabricated using the prior art distributed amplifier 700, two distributed amplifiers 700 serving as a transmitter and a receiver, respectively, are required and, in addition, a T/R switch having a frequency band as wide as or wider than that of the distributed amplifier is required for switching the signal input-output path between the transmitter and the receiver. Therefore, if a T/R module is fabricated using the prior art distributed amplifiers 700, the chip size of the T/R module is unfavorably increased by the T/R switch. Further, the signal transmission loss due to the T/R switch must be considered.